Semiconductor device and mounting structure of a semiconductor device

专利摘要:
A mounting structure is provided for mounting a semiconductor device having electrodes on a mounting substrate having conductive pads. The metal bumps electrically connect the electrodes of the semiconductor device to the conductive pads. A first process solder is used to solder between the metal bumps and the electrodes of the semiconductor device. The second process solder is used to solder between the metal bumps and the conductive pads of the substrate. The melting point of the metal bumps is higher than the melting point of the process solder and the fatigue resistance of the first process solder is higher than the fatigue resistance of the second process solder. The first process solder is composed of 63% by mass of Sn component, 34.3% by mass of Pb component, 1% by mass of In component, 0.7% by mass of Sb component, and 1% by mass of Ag component.
公开号:KR20000076932A
申请号:KR1020000014623
申请日:2000-03-22
公开日:2000-12-26
发明作者:이마이가즈나리；와따나베쇼지
申请人:모기 쥰이찌；신꼬오덴기 고교 가부시키가이샤；
IPC主号:

专利说明:

Semiconductor device and mounting structure of semiconductor device {SEMICONDUCTOR DEVICE AND MOUNTING STRUCTURE OF A SEMICONDUCTOR DEVICE}
[9] Field of invention
[10] The present invention relates to a structure for mounting a semiconductor device on a mounting substrate such as a printed circuit board and a semiconductor device.
[11] Description of the related technology
[12] The basic concept of a conventional structure for mounting a semiconductor device on a printed circuit board will be described below with reference to FIG.
[13] First, the general structure of the semiconductor device 10 and the printed circuit board 12 is described.
[14] The electrode 14 is formed to be exposed on the surface of the semiconductor device 10.
[15] The metal bumps 16 are previously attached on the surface of the electrode 14. The metal bumps 16 are composed of eutectic solder to have a general spherical or columnar shape.
[16] The pad 18 is formed on the surface portion of the printed circuit board 12 on which the semiconductor device 10 is mounted at a position corresponding to the surface portion of the electrode 14 formed on the semiconductor device 10.
[17] Next, a structure for mounting the semiconductor device 10 (on the printed circuit board 12) will be described.
[18] The semiconductor device 10 is a printed circuit board 12 such that each metal bump 16 attached to each electrode 14 of the semiconductor device 10 is located on a corresponding pad 18 of the printed circuit board 12. It is disposed on the mounting site of.
[19] While maintaining this positional relationship, heat is applied to melt the metal bumps 16 of the process solder.
[20] Therefore, the semiconductor device 10 is mounted on the printed circuit board 12.
[21] In the structure mounting the conventional semiconductor device, the spherical or columnar metal bumps 16 of the process solder are melted and fluidized over the pad 12 on the printed circuit board 12. Thereby, the metal bumps 16 collapse in a shape as shown in FIG. 4 to reduce the height H. FIG.
[22] In particular, as indicated by reference numeral 10 shown in FIG. 5, an insulating protective film 30 is formed on the passivation film 28 to which the electrode terminal 26 of aluminum is exposed and is electrically connected to the electrode terminal 26. The formed circuit pattern 32 is formed on the protective film 30, and the electrode 14 (in the columnar shape in FIG. 5) is formed on the circuit pattern 32, and the metal bumps are formed on the electrode 14. 16 is attached, the molding resin 36 is a semiconductor device molded on the circuit pattern 32 so that only the tip of each electrode 14 is exposed, or as shown in Fig. 6, a semiconductor chip 24 In the case of a semiconductor device having a small size, such as a semiconductor device in which a metal bump 16 is directly attached to an electrode 14 formed on the surface of an active element of the electrode, the metal bumps 16 It is necessary to minimize the diameter of). As an example, when a spherical metal bump 16 of approximately 0.45 mm diameter is formed, its height after melting is in the range of approximately 0.3 to 0.32 mm.
[23] However, in the connection reliability evaluation test in which the semiconductor device 10 is thermally shocked in a state where the semiconductor device 10 is mounted on the printed circuit board 12, the higher the height of the metal bump 16 after being mounted on the printed circuit board 12, the test. The results were found to tend to be better. Therefore, it is desirable to keep the height of the metal bumps 16 as large as possible to realize high reliability.
[24] In addition, when the semiconductor device is subjected to thermal shock, fatigue (eg, cracking) occurs near the end of the metal bump 16 on the semiconductor device 10 or the end on the printed circuit board 12. This can lead to poor connection. Therefore, it is desirable to increase the strength of the end region having low strength to realize high reliability.
[25] In particular, since the original height of the metal bumps 16 in the semiconductor device 10 shown in FIG. 5 or 6 is low, it is most important to keep the original height as large as possible to increase the connection reliability.
[26] An object of the present invention is to provide a structure for mounting a semiconductor device on a printed circuit board and a semiconductor device thereof, which can further stabilize the connection between the semiconductor device and the printed circuit board.
[27] Another object of the present invention is to solve the above problems in the prior art.
[1] BRIEF DESCRIPTION OF THE DRAWINGS The figure explaining one embodiment of the mounting structure for semiconductor devices of this invention.
[2] 2 is a diagram illustrating not only one embodiment of a chip size semiconductor device according to the present invention but also a structure in which the semiconductor device is mounted on a printed circuit board.
[3] 3 is a view for explaining another embodiment of a chip size semiconductor device according to the present invention as well as a structure in which the semiconductor device is mounted on a printed circuit board.
[4] 4 is a view for explaining an example of a mounting structure for a conventional semiconductor device.
[5] 5 is a view for explaining an example of a conventional semiconductor device.
[6] 6 is a view for explaining another example of a conventional semiconductor device.
[7] 7 is a graph showing comparative experimental data according to the present invention with respect to the prior art.
[8] 8 is a schematic cross-sectional view showing the high temperature solder ball used in the experiment of FIG.
[28] The present invention provides a mounting structure for mounting a semiconductor device having an electrode on a mounting substrate having a conductive pad, comprising: a metal bump for electrically connecting an electrode of the semiconductor device to a conductive pad; First process solder for soldering between the metal bump and the electrode of the semiconductor device; A second process solder for soldering between the metal bumps and the conductive pads of the substrate, wherein the melting point of the metal bumps is higher than the melting points of the first and second process solders and the fatigue resistance of the first process solders is greater than the second process solders. It provides a mounting structure of a semiconductor device higher than the fatigue resistance of the process solder.
[29] According to the present invention as defined above, since the metal bumps are composed of a metal material having a melting point higher than the melting points of the first and second process solders, the metal bumps are not melted when the semiconductor device is heated during mounting. Keep the height of it. By this, satisfactory results can be obtained in the connection reliability evaluation test in which the semiconductor device is subjected to heat shock in a state where the semiconductor device is mounted on the printed circuit board. Also, to connect any of the ends of the metal bumps on the semiconductor device or the printed circuit board, where it is prone to fatigue such as cracking when exposed to thermal shock, it is higher than that used to connect the other end. By the use of process solder having fatigue resistance, the overall resistance to thermal shock is increased, resulting in high reliability.
[30] One example of a process solder having higher fatigue resistance is mainly composed of a Sn component and a Pb component, and also composed of at least two of an Ag component, an In component, an Sb component, and a Cu component. It consists of a Sn component of 63% by mass, a Pb component of 14.3% by mass, an In component of 1% by mass, a Sb component of 0.7% by mass, and an Ag component of 1% by mass.
[31] Other examples of process solders with higher fatigue resistance are shown in Table I below: (1) two metals (among Ag, In and Sb) added to Sn and Pb; (2) three metals (Ag, In and Sb) added to Sn and Pb; And (3) four metals (Ag, In, Sb and Cu) added to Sn and Pb.
[32] Table I (Mass ratio%)SnPbAgInSbCu 2 metal additions63Balance1.01.000 〃63Balance1.000.70 〃63Balance01.00.70 〃63Balance1.001.00 3 metal additions63Balance1.01.00.70 4 metal additions63Balance1.01.01.00.1
[33] One example of a material for metal bumps is high melting point solder Cu or Ni, which has a higher melting point than process solder.
[34] In one embodiment of the semiconductor device of the present invention, an insulating protective film is formed on a surface of a semiconductor chip on which an electrode terminal is formed, and a circuit pattern electrically connected to the electrode terminal is formed on an insulating protective film, and formed on the circuit pattern. According to an embodiment in which the metal bumps are attached to the electrodes, the process solder used between the metal bumps and the electrodes may include a Sn component of 63% by mass, a Pb component of 34.3% by mass, an In component of 1% by mass, and an Ag component of 1% by mass. It has a high fatigue resistance, and the metal bump is composed of a metal material having a higher melting point than the process solder.
[35] As another embodiment of the semiconductor device of the present invention, in accordance with an embodiment in which metal bumps are attached to electrode terminals formed on the semiconductor device, the process solder used between the metal bumps and the electrodes has a Sn component of 63% by mass and a mass of 14.3. Consists of% Pb component, 1% In component by mass, 0.7% Sb component by mass, and 1% Ag component by mass and has high fatigue resistance, and the metal bump is composed of a metal material having a higher melting point than process solder .
[36] Since such semiconductor devices are highly resistant to thermal shock, they result in high reliability in connection reliability evaluation tests that are subjected to thermal shock after being mounted on a printed circuit board, which is generally considered to be prone to fatigue such as cracking. This is because the process solder used at the end of the metal bump on the semiconductor device has higher fatigue resistance than another process solder used at the end of the metal bump on the printed circuit board.
[37] Best mode for carrying out the invention is described in detail below with reference to the accompanying drawings.
[38] First, a structure for mounting a semiconductor device is described with reference to FIG. 1. In this context, since the basic structures of the semiconductor device and the printed circuit board are substantially the same as those already described with reference to the prior art, the same reference numerals are used for similar parts in this figure, and the detailed description thereof is omitted.
[39] The electrode 14 of the semiconductor device 10 is electrically connected to the pad 18 on the printed circuit board 12 through the metal bumps 16 formed of a metal material having a higher melting point than the process solder. Although the metal bumps 16 are formed to have a spherical contour in FIG. 1 as an example, the bumps may be cylindrical in shape.
[40] A first feature of the mounting structure for a semiconductor device according to the present invention is that the metal bumps 16 are made of a metal material having a higher melting point than the process solder, so that the metal bumps 16 can be made of the electrodes 14 of the semiconductor device 10. Even though the process solder used to solder to the pad 18 of the printed circuit board 12 as described below is not melted, the metal bumps 16 remain in their original shape and height H. For example, this metal material may be a high melting point solder having a higher melting point than Cu or Ni, which is a process solder (comprising a Sn component of 61.9% by mass, a Pb component of 38.1% by mass, and having a melting point of 183 ° C). In this regard, the high melting point solder may be composed of a Pb-Sn alloy having a Pb component in the range of 90% to 97% by mass. This melting point is about 300 ° C. Since the metal bumps 16 can maintain a predetermined desired height H, the larger the height of the metal bumps 16 after being mounted on the printed circuit board 12, the more satisfactory the test result will be in the connection reliability evaluation test. It is possible to achieve a decent result.
[41] Second feature of the present invention, using process solders 20, 22 to solder metal bumps 16 to electrodes 14 of semiconductor device 10 and to pads 18 of printed circuit board 12. Silver is used to connect the process solder 20 and the metal bumps 16 used to connect the metal bumps 16 to the electrodes 14 of the semiconductor device 10 to the pads 18 of the printed circuit board 12. One of the process solders 22 to be made has a higher fatigue resistance than the other process solder.
[42] One example of a process solder with higher fatigue resistance is one compound consisting essentially of a Pb-Sn alloy plus a specific element that crystallizes the intermetallic compound in the structure, which leads to migration and growth of Pb. It can be used to realize longer life or higher fatigue resistance. The typical composition has a melting point of 183 ° C. with a Sn component of 63% by mass, Pb of 14.3% by mass, In component of 1% by mass, Sb component of 0.7% by mass and Ag component of 1% by mass.
[43] The parts to be soldered with this process solder having high fatigue resistance are determined by the result of the connection reliability evaluation test in which the semiconductor device 10 previously mounted on the printed circuit board 12 is subjected to thermal shock.
[44] Generally speaking, since it is necessary to make the surface area of the electrode 14 smaller than the surface area of the pad 18 provided on the printed circuit board 12, the electrodes of the metal bump 16 and the semiconductor device 10 ( The cross-sectional area of the soldered portion 14 (e.g., the process solder 20 for soldering the end of the metal bump 16 on the semiconductor device 10) is the pad of the metal bump 16 and the printed circuit board 12. 18 is smaller than the cross-sectional area of another soldered portion (e.g., process solder 22 for soldering the end of metal bump 16 on printed circuit board 12). In the connection reliability evaluation test, it is considered that fatigue such as cracking is more likely to occur in the soldering process 20 for soldering the end portions of the metal bumps 16 on the semiconductor device 10. Therefore, eutectic solder having higher fatigue resistance is used as eutectic solder 20.
[45] In contrast, the surface area of the electrode 14 provided on the semiconductor device 10 is larger than the cross-sectional area of the pad 18 provided on the printed circuit board 12 and the end of the metal bump 16 on the printed circuit board 12 is removed. If the process solder used to solder is more susceptible to fatigue, such as cracking, in the connection reliability test, a process solder with higher fatigue resistance should be used.
[46] According to this structure, a process used to connect the semiconductor device 10 and one of the ends of the metal bumps 16 on the printed circuit board 12 which is considered to be more likely to cause fatigue such as cracking when subjected to thermal shock. Since the solder is improved in durability, it is possible to increase the durability of the mounting structure for the semiconductor device 10 as a whole against heat shock.
[47] Process solder having a higher fatigue resistance obtained by adding a specific element to a conventional process solder in advance is used in the above embodiment, but the process bumps are used for the metal bumps 16 to the electrodes 14 of the semiconductor device 10. When the solder or the semiconductor device 10 supporting the metal bumps 16 is mounted on the printed circuit board 12, the process solder after the electrode 14 or the pad 16 is coated with flux in advance. It is common to adopt a method of coating with a paste or a method in which a solder layer is plated on the surface of the electrode 14 or the pad 18 and the flux is coated thereon.
[48] In this case, these specific elements are initially added to the flux rather than to the process solder. When the process solder is heated and melted, certain elements contained in the flux are mixed with the process solder. As a result, it is possible for the flux premixed with certain elements to convert conventional process solder into process solder with high fatigue resistance.
[49] Next, a semiconductor device suitable for the above mounting structure will be described with reference to FIGS. 2 and 3.
[50] The semiconductor device described hereinafter is a semiconductor device having a so-called chip size contour already described with reference to the prior art shown in FIGS. 5 and 6.
[51] First, the semiconductor device 10 shown in FIG. 2 will be described. Since this semiconductor device 10 is basically the same as the semiconductor device 10 shown in Fig. 5, the same reference numerals are used to indicate similar parts.
[52] In this structure, the electrode terminal 26 made of aluminum or the like is formed in the passivation film 28 on the electrode terminal formation surface of the semiconductor chip 24 to be exposed. It should be noted that there is a structure without the passivation film 28 and the like.
[53] The circuit pattern 32 electrically connected to the electrode terminal 26 is formed on the protective film 30, the electrode 14 (in the columnar shape in FIG. 2) is formed on the circuit pattern 32, and the molding Molded with resin 36 to expose only the top of electrode 14. Metal bumps 16 are bonded to the exposed top of electrode 14 through process solder 20.
[54] A feature of this arrangement is that the metal bumps 16 are formed of a metal material having a higher melting point than the process solder such as high melting point solder Cu or Ni, and the process solder 20 is the above process solder having high fatigue resistance. have.
[55] This is because, as described above, when the semiconductor device 10 is mounted on the printed circuit board 12, the metal bumps 16 do not melt to ensure a sufficient height H, and crack in the connection reliability evaluation test. This is because the fatigue resistance of the process solder 20 used to connect the ends of the metal bumps 16 on the semiconductor device 10, which are considered experimentally, to be prone to fatigue such as this, is improved.
[56] When the semiconductor device 10 is mounted on the printed circuit board 12, the metal bumps 16 on the pads 18 (not shown in FIG. 1, but similar to those shown in FIG. 1) of the printed circuit board 12. Another process solder 22 used to connect is a conventional component.
[57] Next, the semiconductor device 10 shown in FIG. 3 will be described. Like reference numerals are used to designate similar parts of the semiconductor device 10 shown in FIG.
[58] An insulating protective film 30 (for example, a polyimide film) is formed on the passivation film 28 where the electrode terminals of the semiconductor chip 26 are exposed, and the circuit pattern 32 is a protective film for connecting with the electrode terminal 26. It is formed on (30).
[59] The second insulating protective film 38 (eg, polyimide film) is formed over the surface on which the circuit pattern 32 is provided. Portions of the first passivation layer 38 corresponding to the position of the circuit pattern 32 to which the metal bumps 16 are attached are removed to form the electrode 14.
[60] The metal bumps 16 are bonded to the electrodes 14 with process solder 20.
[61] In the same manner as in the semiconductor device 10 shown in FIG. 2, the metal bumps 16 are made of a metal material having a higher melting point than the process solder such as high melting point solder Cu or Ni, and the process solder 20 is It is a process solder having the high fatigue resistance described above.
[62] When the semiconductor device 10 is mounted on the printed circuit board 12, the process solder having a conventional configuration is used as the process solder for connecting the metal bumps 16 to the pads 18 of the printed circuit board 12. .
[63] In the semiconductor device 10 previously described with reference to FIG. 6, the metal bumps 16 are directly attached to the electrodes 14 formed on the surface of the active element of the semiconductor chip 24 and the like, and also the metal bumps 16 ) May be composed of a metal material such as high melting point solder Cu or Ni having a higher melting point than the process solder, and the process solder 20 used to connect the electrode 14 to the metal bumps 16 is described above. It can be a process solder having high fatigue resistance.
[64] In FIG. 7, comparative experimental data and comparative example data of the effects of the present invention are shown and FIG. 8 shows the high temperature solder balls used in the experiment of FIG. 7, where reference numeral 40 is a semiconductor element and 41 is a polyimide The film 42 is a metal post (Cu), 43 is a process solder, 44 is a high temperature solder ball, 45 is a wiring pattern, and 46 is a capsule encapsulant.
[65] According to the connection reliability evaluation test in which the semiconductor device shown in FIG. 8 was subjected to heat shock, the temperature cycle was from -40 ° C to + 125 ° C. The comparative data of FIG. 7 shows a cycle in which 1 percent of unsatisfactory products occur in the semiconductor device of the present invention shown in FIG. 8 (FIG. 2 or FIG. 3) and the semiconductor device of the prior art shown in FIG. 5 or 6. Shows. As shown in Figure 7, according to a comparative example in which prior art process solders are used, the frequency of occurrence (CDF) is approximately 600 cycles. In contrast, according to the present invention in which high temperature solder bumps are used, the frequency of occurrence (CDF) is approximately 900 cycles.
[66] In the comparative data shown in FIG. 7, the present invention shows the use of the solder of “three metal additions” in Table I and the comparative example shows the use of conventional process solder.
[67] Thus, according to the present invention, a semiconductor device having high durability against thermal shock can be obtained.
[68] Since the metal bumps are made of a metal material having a higher melting point than the process solder according to the structure for mounting the semiconductor device of the present invention, the metal bumps are prevented from being melted when heated during mounting of the semiconductor device, and the original height is increased. It is possible to maintain. Therefore, satisfactory results are obtained in the connection reliability evaluation test in which the semiconductor device is subjected to heat shock in a state where the semiconductor device is mounted on the printed circuit board. The process solder used to connect either end of a metal bump on a semiconductor substrate or a printed circuit board, which is prone to fatigue such as cracking when subjected to thermal shock, is higher than the other process solder used to connect the other end. Because of its fatigue resistance, it is possible to improve the overall durability against heat shock and achieve high reliability.
[69] Further, according to the semiconductor device of the present invention, since the metal bumps are made of a metal material having a higher melting point than the process solder, when the semiconductor device is mounted, it is not melted even when heat is applied to maintain the original height. Process used to connect the ends of metal bumps on semiconductor devices that are considered experimentally fatigue-prone to cracking when the semiconductor device is subjected to thermal shock Another process where solder is used to connect the other end on a printed circuit board Since it has higher fatigue resistance than solder, it is possible to improve durability against heat shock applied after the semiconductor device is mounted and to bring high reliability.
[70] It is to be understood by those skilled in the art that the foregoing description relates to only some preferred embodiments of the invention disclosed and that various changes and modifications can be made to the invention without departing from the spirit and scope of the invention.

权利要求:
Claims (8)
[1" claim-type="Currently amended] In a mounting structure for mounting a semiconductor device having an electrode on a mounting substrate having a conductive pad,
A metal bump for electrically connecting an electrode of the semiconductor device to the conductive pad;
First process solder soldering between the metal bump and the electrode of the semiconductor device;
Second process solder for soldering between the metal bump and the conductive pad of the substrate
Including;
The melting point of the metal bumps is higher than the melting points of the first and second process solders, and the fatigue resistance of the first process solders is higher than the fatigue resistance of the second process solders.
[2" claim-type="Currently amended] The mounting structure of a semiconductor device according to claim 1, wherein the first process solder is mainly composed of a Sn component and a Pb component, and is composed of at least two of an In component, an Sb component, an Ag component, and a Cu component.
[3" claim-type="Currently amended] The semiconductor device mounting structure of claim 1, wherein the metal bumps are high melting point solder Cu or Ni having a higher melting point than the first and second process solders.
[4" claim-type="Currently amended] In a mounting structure for mounting a semiconductor device having an electrode on a mounting substrate having a conductive pad,
A metal bump for electrically connecting an electrode of the semiconductor device to the conductive pad;
First process solder for soldering between the metal bump and the electrode of the semiconductor device;
Second process solder for soldering between the metal bump and the conductive pad of the substrate
Including;
The melting point of the metal bump is higher than the melting point of the first and second process solders, and the fatigue resistance of the second process solder is higher than the fatigue resistance of the first process solder.
[5" claim-type="Currently amended] 4. The mounting structure of a semiconductor device according to claim 3, wherein the second eutectic solder is mainly composed of a Sn component and a Pb component, and is composed of at least two of an In component, an Sb component, an Ag component, and a Cu component.
[6" claim-type="Currently amended] 4. The semiconductor device mounting structure of claim 3, wherein the metal bumps are high melting point solder Cu or Ni having a higher melting point than the first and second process solders.
[7" claim-type="Currently amended] A semiconductor element having an electrode forming surface on which a first electrode terminal and an insulating protective film are formed;
A wiring pattern formed on the passivation film to be electrically connected to the first electrode terminal;
A metal bump electrically connected to the wiring pattern by a second electrode terminal;
A process solder for soldering between the metal bumps and the second electrode terminal, the process solder having high fatigue resistance and having 63% by mass of Sn component, 34.3% by mass of Pb component, 1% by mass of In component, 0.7% by mass of Sb component, and Process solder composed of 1% Ag by mass
Including;
And the melting point of the metal bump is higher than the melting point of the process solder.
[8" claim-type="Currently amended] A semiconductor element having an electrode;
A metal bump electrically connected to the electrode;
A process solder for soldering between the metal bumps and the electrodes, which has high fatigue resistance, is mainly composed of Sn and Pb components, and is also formed of at least two of In, Sb, Ag and Cu components.
Including;
And the melting point of the metal bump is higher than the melting point of the process solder.

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同族专利:

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公开号 | 公开日

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US6285083B1|2001-09-04|

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KR100642229B1|2006-11-02|

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TW455960B|2001-09-21|

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EP1039527A2|2000-09-27|

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EP1039527A3|2002-03-06|

引用文献:

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公开号 | 申请日 | 公开日 | 申请人 | 专利标题

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法律状态:
1999-03-24|Priority to JP99-78732

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1999-03-24|Priority to JP7873299

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2000-03-22|Application filed by 모기 쥰이찌, 신꼬오덴기 고교 가부시키가이샤

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2000-12-26|Publication of KR20000076932A

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2006-11-02|Application granted

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2006-11-02|Publication of KR100642229B1

优先权:

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申请号 | 申请日 | 专利标题

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JP99-78732|1999-03-24|

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JP7873299|1999-03-24|